When a semiconductor device is manufactured, a film on a substrate is often polished to planarize the film or make the film thinner. Such a polishing process is performed, for example, by a chemical mechanical polishing (CMP) apparatus. However, in a case of manufacturing the semiconductor device that has a large vertical dimension such as a 3-D memory, there is a problem that it is difficult to planarize a concave portion formed in the film on the substrate and having a large area by the CMP apparatus. In this case, although the flatness of the film can be improved by using a hard pad as the polishing pad, the film is excessively polished or is not sufficiently polished near a partition wall between pressure rooms in the polishing head, which deteriorates in-plane uniformity of the thickness of the film. Therefore, there is a need for a polishing technique that can improve the in-plane uniformity of the thickness of a polishing target film.